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IBM, AMD Retain Chipmaking Ties

IBM and AMD have extended their chipmaking contract through 2008 in an effort to make smaller and faster CPUs.

Under the extended agreement, AMD will pay IBM between approximately $250 million and $280 million to jointly develop new logic processes, including 65-nanometer (nm) and 45nm technologies.

The current contract was to expire at the end of the year. Sunnyvale, Calif.-based AMD revealed the extension as part of a statement filed with the Securities and Exchange Commission Wednesday.

"We basically extended the agreement by three years because it has allowed both companies to access each other's technology, and it helps us strengthen our technology roadmap going forward," AMD spokeswoman Karen Prairie told internetnews.com.

In addition, AMD purchased an $11 million license from IBM so it can produce 90nm and 65nm products at AMD's 300-millimeter Dresden fabrication facility, a third-party foundry or a joint manufacturing facility owned by AMD and one of its partners. Previously, all the work was being done at IBM's facility in East Fishkill, New York.

Also as an incentive, if AMD and IBM jointly develop 32nm technologies by the end of 2008, AMD said the technology licensing rights would be theirs.

As much as the partnership is about building their individual technologies, it is also designed to get the attention of Intel . The chipmaking giant is focused on three major process transitions: sub 90nm lithography, 300mm wafers and copper interconnects. But unlike Intel, whose chips are primarily based on CMOS technologies, AMD and IBM have added high-speed silicon-on-insulator transistors to their processor designs.

IBM has been more than happy to lend a hand in making chips with AMD. Big Blue's microprocessor division has also had a bone to pick with Intel with the advent of 64-bit, 90nm Xeon and Itanium processors for high-end systems.

Using SOI processes and architectures have allowed IBM to drop its production costs and the amount of power each chip needs to operate. The company's PowerTune designs together with the SOI, allows operation as low as 15 watts, according to semiconductor analysis firm Chipworks.

IBM is now using a technique they called Strained Silicon Directly on Insulator (SSDOI), in which a Silicon-Germanium (SiGe) layer is used to strain the SOI layer, and then removed, leaving a strained silicon layer on the buried oxide. This technique strains the NMOS and PMOS transistors simultaneously.