A Group Stand by The Storage Bay

Dell, EMC, Intel and LSI Logic today said they have formed the Storage Bridge Bay Working Group (SBB), whose mission is to provide some flexibility in the way interface cards can be used on storage boxes.

Currently, specific interface controllers for classes of storage such as JBOD (just a bunch of disks) and RAID (redundant array of independent disks) , are created differently and fit into specific slots on the backs of storage arrays like pieces in a puzzle.

SBB will define interface requirements so that hardware vendors can design a storage controller card that will fit it and work with the backplane connectors of almost any storage array, regardless of whether the card is specifying JBOD or RAID technology.

SBB is specifying a new modular backplane connector that can support 28 drives, redundant bridge controllers and a redundant management interface.

“Once you design one enclosure with SBB-compliant slots, you can change the function of that enclosure by changing the SBB canisters [controllers],” said Bill Dawkins, SBB chairman and Dell technology strategist. “What we’re telling people how to do is design an interface that allows them to change these things.”

Dawkins said the group expects its specs will help speed the delivery of newer, cost-effective storage technologies, such as iSCSI , SAS (serial attached SCSI) , archiving and virtual tape libraries.

“What we’re trying to do is standardize parts of the storage enclosure to allow you to adopt new technology as they become available,” Dawkins said. “Standardization brings with it an efficiency and affordability and we expect to see it passed on to the customer.”

The chairman expects SBB will yield shortened development cycles, freeing up systems vendors to spend more of their time on creating new products.

To date, Adaptec, AMCC, Dot Hill Systems, Neterion, Seagate and a few others have joined the founding members.

Dawkins said SBB is going public today to expand membership and will discuss the SBB spec Wednesday at the Intel Developer Forum in San Francisco.

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