Intel Chip to Drive TCP/IP

Intel announced new technology today that embeds TCP/IP Offload Engine (TOE) functions on a processor instead of a network card.

The chipmaking giant said the problem is that CPU performance and
network bandwidth have improved, but not the method for moving TCP/IP

Dubbed the Intel I/O Acceleration Technology (I/OAT), the chipset
add-on speeds up the protocol stack in a CPU , allowing the chip to do its own job and not depend so much on network traffic as it waits for the subsystem. The technology also includes data copying performed in a chipset, parallel processing of data and commands, and direct memory access in network controller. Intel said putting the TOE capabilities inside a chip instead of relying on a separate card increased performance in 90 percent of the applications it tested.

Stephen Chenoweth, marketing manager for digital entertainment at Intel, said I/OAT also includes storage acceleration technology, which offloads the CPU of RAID-6 storage processing.

“The problem we hear from customers is ‘I’ve upgraded my system but my applications are not responding in the network and the CPU as fast as they should,'” Chenoweth said during a press briefing. “It is really a transport problem up to the applications. The Acceleration technology lifts the network controller and analyzes the components.”

Chenoweth said the technology would only be good for new chips with no way to retrofit older CPUs because it relies on the network

He also said I/OAT also does not interact with non-Intel
architectures, which may be problematic for heterogeneous networks.
Intel also said the Acceleration technology is built in as an
always-on function within the processor but does not pose a “back-door” threat for Trojans or worms. Intel said the I/OAT technology would not be ready for production until at least 2006.

Intel said its I/OAT functions also do not compete with AMD’s HyperTransport interconnect technology. Instead, Frank Spindler, vice president of technology programs at Intel said
HyperTransport really competes with Intel’s Front-Side-Bus approach.

“At one time, it would probably have been fair to say that
HyperTransport was positioned to be a competitor to what later became
PCI-Express,” Gordon Haff, a principal analyst with semiconductor market research firm Illuminata told “But AMD basically threw in the towel on that one and focused HyperTransport on a more limited, albeit very important, role.”

The move is the latest by Intel to cram as many functions it can on a chip and improve interactions between networked clients and server applications. I/OAT is joining the rest of Intel’s “*T family” of technologies. The lineup includes Hyper Threading (HT) for
multi-functionality, Vanderpool Technology (VT) for virtualization,
LaGrande Technology (LT) for security, Intel’s Active Management
Technology (iAMT) for hardware management, and Intel’s 64-bit extensions (EM64T), which are already in Pentium and Xeon processors respectively.

The I/OAT rollout also coincides with the next Intel Developers Forum in March. The company will be celebrating the 40th Anniversary of Moore’s Law as well as highlighting its plans for its multi-core products. Intel said it has more than 10 multi-core projects underway.

Spindler said Intel would also update developers on the chipmaking
giant’s roadmap including the development of its 90-nanometer (nm)
technology process for Pentium desktops and the debut of 65-nm chips.

“We are expecting the 65-nanometer chips to be in production across platforms by the end of the year and functioning in devices on several of those platforms,” Spindler said.

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