Intel officials this week rolled out a roadmap of new process and packaging technologies they say will help the company work its way back to the leadership position in chip manufacturing by 2025 after several years of missed deadlines and product delays.
The announcement is a key part of CEO Pat Gelsinger’s larger multi-billion dollar push unveiled in March to reestablish Intel’s manufacturing prowess, which until recent years was a source of strength as it accumulated more than 90 percent share of the PC and server chip markets.
The company this week got a reminder of the new level of competition it faces. Top chip-making foundry Taiwan Semiconductor Manufacturing Corp. (TSMC) announced it will start construction of a factory that officials said will begin manufacturing 2-nanometer chips in 2023.
In addition, longtime x86 processor rival AMD posted strong second-quarter financial numbers that included record data center revenue driven by the growing popularity of its Epyc server processors. AMD, which spent more than a decade falling farther behind Intel in the data center after being unable to continue the momentum behind its Opteron launch, has surged in recent years to become a valid Intel competitor based on the performance of its Zen architecture, which is the foundation of the Epyc and Ryzen client chips.
AMD officials also said they plan to roll out products based on their next-generation Zen 4 architecture next year.
The increased competition comes at a time when Intel has stumbled in its processor roadmap and struggled to make the transition to 10nm and then 7nm. However, with the new processes and packaging technologies, Intel officials see reaching performance parity in 2024 and leadership a year later. The company has the tools in place to make this happen, Gelsinger said during a virtual press event.
“Delivering leadership products requires the right combination of process and packaging, silicon and platforms, software and at-scale manufacturing,” the CEO said. “This is a combination only Intel has, including our unquestioned leadership and breakthroughs in areas like 3D packaging technology.”
Building on IDM 2.0
Gelsinger in March introduced what he called IDM 2.0 – based on Intel’s integrated device manufacturing model – that included spending more than $20 billion to expand chip-making capabilities in the United States, making chip factories in the United States and Europe available to other vendors as part of an expanded foundry business, and using third-party partners to build some Intel products.
Intel’s latest announcement includes the introduction of new technologies like RibbonFET and PowerVia. RibbonFET is a gate-all-around transistor, the first new transistor architecture since launching FinFET in 2011. It includes multiple fins in a smaller area, delivering faster transistor switching speeds with the same drive current. PowerVia is a backside power delivery system that moves the interconnects for delivering power and ground from the top of the transistor to the bottom. Both will help boost performance and efficiency.
Gelsinger also said the company is changing the naming of its nodes, moving away from focusing on nanometers, which he said no longer has any meaning in the industry. It refers to the length of the gate, which determines whether any of the billions of the transistors are on or off, so the 10 nanometers in a 10nm chip is the length of the gate.
“The goal is to make [processors] smaller, faster, cheaper and more energy efficient, all of which leads to more powerful chips,” he said. “Originally, process nodes were named after the physical length of these transistor gates and were measured in microns as transistors became smaller and the gate length shrank. We started measuring in nanometers in 1997 as the technology continued to progress.”
Turning to FinFET
Innovations like strained silicon and FinFET became equally important to making the chips faster, cheaper and more efficient, and eventually the naming approach stopped matching the actual transistor gate, Gelsinger said.
Patrick Moorhead, principal analyst with Moor Insights and Strategy, told InternetNews that having “nanometer” in a node name is “an old game.”
“I would say that it has been tough to prove ‘nm’ for a decade, so TSMC and Samsung have both used equivalents,” Moorhead said. “The best example was when Samsung renamed its process from ‘6nm’ to ‘5nm’ without any technological change. That didn’t mean the gate length shrank automagically, but rather” when TSMC went to 5nm, Samsung renamed its own node.
Going forward, Intel’s current SuperFin nodes will still be known as 10nm, but its EnhancedSuperFin nodes – which are still based on the FinFET architecture – will be called Intel 7 and will offer 10 to 15 percent better performance-per-watt than 10nm. Intel’s 7nm nodes will be known as Intel 4, fully embrace EUV lithography for printing extremely small features and will drive another 20 percent performance-per-watt improvement. It will come in the second half of 2022 and appear in products shipping in 2023, such as “Meteor Lake” processors for client systems and “Granite Rapids” for servers.
Intel 3, which will be the last to leverage the FinFET process, will be seen in the second half of 2023 with an 18 percent performance-per-watt improvement and increased use of EUV. After that will come Intel 20A, indicating a shift from nanometers to angstroms and coming with PowerVia and RibbonFET. It also will be the node that Intel officials say will allow the company to reach performance parity, ramping in the first half of 2024.
A year later comes Intel 18A and Intel’s return to leadership.
Improving the Packaging
Packing also will be important, Gelsinger said. The company already has been using EMIB (embedded multi-die interconnect bridge) since 2017 and Foveros, a wafer-level packaging technology, which Intel rolled out in 2019. There will be improvements to both as well as with the introduction of Foveros Omni in 2023, a 3D stacking technology that will offer an enhanced interconnect and modular design and enable greater flexibility in its products.
Foveros Direct will deliver low-resistance interconnects and be complementary to Foveros Omni.
Intel also is collaborating with IBM and TSMC in research efforts and both Amazon and Qualcomm are among the first customers for Intel’s foundry business that will build chips for other companies. Both companies base their chips on Arm designs rather than x86. The company also reportedly has said it is negotiating with as many as 100 companies about using its manufacturing fabs for their processors.
Further reading: IBM’s 2nm Chip Will Remake IT Industry
Execution is Key
Moorhead said it’s a positive move for Intel to disclose a roadmap of products so many years into the future.
“It disclosed new transistor and packaging solutions that could differentiate it in 2024-2025,” he said. “What is up in the air, of course, is execution. The company is challenged on a few fronts, but I like it is working with IBM and TSMC. Getting [Amazon Web Services] and Qualcomm as customers says a lot to me about where Intel actually is, but that’s a long way off.”
All this comes amid a changing and consolidating processor space that is seeing Nvidia trying to buy Arm for $40 billion and AMD looking to buy programmable chip maker Xilinx for $35 billion, both of which would mean even stronger competitors for Intel. In addition, Intel reportedly is in negotiations to buy chip manufacturer Globalfoundries – spun off by AMD In 2009 – for about $30 billion. However, Globalfoundries executives have denied the reports and earlier this month announced a $1 billion plan to add capacity to one of its fabs in upstate Malta, NY. It also is building a new fab in the town.
