WiND 802.11a+b Chipset Design Details Revealed

On Monday, Envara Inc. added to the information released regarding its new WiND Dual mode 802.11a+b WLAN chipset that I wrote about yesterday on 802.11-Planet. The newly released information concerns two issues considered to be critical in any effective chipset design. These are power consumption and receiver sensitivity. Ideally, the design process would yield minimum power consumption and maximum receiver sensitivity.

To that end, Envara has developed a patent-pending design which it calls Zero-Loss Front-End. This lengthy name refers to the WiND chipset design, which eliminates off-chip RF front-end components and incorporates the same functionality into the chipset itself. The net effect is reduced power consumption, increased sensitivity and lower manufacturering costs. Envara stated that resultant power consumption savings would range from 15-20% of a typical WLAN NIC. There is a 3 dB increase in receiver sensitivity, which effectively increases coverage by as much as 70% at a given data rate, accompanied by lower power consumption.

The other RF design implementation that will be incorporated into all WiND chipsets is called Enhanced Zero-IF (EZ-IF). This, according to Envara, enables direct conversion to and from 5 GHz and yields lower operating costs. Typically, this signal conversion requires two up or down conversion steps. These steps require additional external components like IF filters, which raises operating costs. Envara stated that is patent-pending EZ-IF design implements direct conversion with no performance sacrifice, and meets technical challenges like I&Q balancing, DC offset removal, and adjacent radio channels rejection.

Envara said that it hopes to differentiate its product offerings in the sector by incorporating these designs into every WiND dual band, 802.11a+b chipset. Envara’s target customers are hardware vendors, WLAN ODMs/OEMs, and consumer electronics manufacturers.

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