Intel will use its upcoming Intel Developer Forum to highlight several key developments in its product roadmap — starting with smaller, more efficient chip designs and specialized applications for its Nehalem line.
In an advance preview today of what’s to come at IDF, which begins Sept. 22 in San Francisco, Intel (NASDAQ: INTC) said the event will lead off with “Westmere,” the first processors built using a 32 nanometer (nm) manufacturing process.
Westmere processors will feature a newer version of Intel’s high-k metal gate technology to reduce power leakage and Intel introduced several other new manufacturing methods as well, as documented in a video showing off the new process.
This new-generation high-k metal gate transistor formula will give Intel “a 3+ year advantage in addressing leaky and energy inefficient transistors,” according to a blog post from Intel spokesman Bill Kircos.
Westmere represents the “tick” in Intel’s two-stage, “tick-tock” roadmap. “Ticks” are processor shrinks, which mean more transistors can be crammed onto the die and power efficiency increases, because the transistors are closer together.
The last “tick” was the shrink from 65nm to 45nm. The next to come after 32nm will reduce the size further, to 22nm.
The “tock” is the new architecture. Intel’s last “tock” release was Nehalem, introduced last fall. The next will come in 2010, in the form of the new architecture codenamed “Sandy Bridge,” which will also be disclosed at this month’s IDF.
The other big development at IDF will be Nehalem-based chips codenamed “Jasper Forest” and designed for the embedded and storage sectors. This family of products will bring Nehalem to the embedded market, offering integrated PCI Express (PCIe) and an integrated I/O hub in a dual-processor Xeon processor.
This will allow for much faster and denser storage and communications solutions such as IPTV, VoIP, NAS, SAN and wireless radio network controllers. Intel said it will provide everything from single-core, 23-watt processors to a quad-core, 85-watt processors under the Jasper Forest name, and they will all be socket-compatible.
The Intel Developer Forum runs Sept. 22 to 24 in the Moscone Convention Center in San Francisco. The opening day keynote will be CEO Paul Otellini and Sean Maloney, newly minted executive vice president of the Intel Architecture Group.
The original keynote speaker following Otellini had been Pat Gelsinger, who today jumped ship amid a reorg at Intel to join storage giant EMC (NYSE: EMC).
