Despite the fact that x86 servers continue to make up more than 90 percent-plus of server sales, IBM and Sun Microsystems are hanging in there with their RISC-based processors and are going to show off the latest generation at the day-two wrap up of the Hot Chips conference at Stanford University on Tuesday.
If there is a success story in RISC these days – other than the ARM processor – it’s IBM (NYSE: IBM), with its Power line of processors. The Power 6 is used in System P servers, which account for 55 systems on the Top 500 supercomputer list last month.
IBM has gotten a lot of mileage out of the Power 6, pushing it to 5Ghz in the process. But it had its limitations, like being only dual core and using the 65nm manufacturing process. The Power 7 will be an eight-core, 45nm processor with support for up to a 32-socket servers.
The older chips used very large off-chip caches of up to 30MB, but pin constraints on the Power 7 made this impossible. The Power 7 will use on-die eDRAM that has a very low power draw but very high speeds. The chip will have up to 32MB of L3 cache with “private” memory stores accessible only to one core. These stores can be migrated to be physically closer to the core, giving the Power 7 up to five times less latency than a typical L3 cache.
To improve memory performance, the Power 7 will come with dual integrated DDR3 controllers for high channel and DIMM utilization, along with enhanced energy management and RAS
Sun’s UltraSparc and next generation of Niagara
Sun’s UltraSparc processors have not been so lucky. They have fallen behind the performance curve to x86 and the next-generation processor, codenamed “Rock,” is MIA and believed to have been killed by Sun (NASDAQ: JAVA), although the company has yet to confirm it.
Along with faltering sales, Sun’s hardware faces an uncertain future now that Oracle’s planned acquisition of Sun has been given the green light by the government. Despite promises from Oracle CEO Larry Ellison to continue investing in Sun’s hardware, there is considerable doubt he actually will, which has led to a lot of customers and partners abandoning the platform.
Still, Sun soldier’s on. “Rainbow Falls” is the codename for its next-generation Niagara processor. The chip will come with 16 cores, each with its own L2 cache and four Coherency units.
A Coherency Unit (COU) helps keep track of all the memory contents and what is where in a dense cluster of systems, which can have dozens of cores and terabytes of memory. When one process core alters some data, all the other processors have to be told their cache data is old and get the new data.
With 16 cores and an equal number of caches, the Rainbow Falls design looks something like a checkerboard and juggling all those caches is a huge challenge. To prevent L2 cache misses and optimize layout, Sun is adding a core to L2 Bank Crossbar (CCX), where two cores share a common port into a CCX, and the CCX connects all 16 L2 caches.
RISC still has a position in the market, according to Dean McCarron, president of Mercury Research.
“As long as the performance and bandwidth and processing requirements in that space remain there and remain a viable market, with significant money chasing that performance, if the dollars exceed the development costs, you will continue to see these products,” he told InternetNews.com.
He declined to comment further, as the processors are both so new and so few details are known, but he did say that at eight or 16 cores, the issue of coherency becomes paramount because so many caches have to keep their data current.
