Why AMD Went the Multi-Chip Module Route

When Intel first introduced its quad-core Xeons, which consisted of two dual-core chips on one die, there was no shortage of ridicule from AMD, which was touting a pure quad core design for still-in-development Barcelona.

With the announcement of the 12-core “Magny-Cours” processor due in 2010, AMD is adopting that same solution. It’s taking two six-core chips, codenamed “Sao Paulo,” and putting them together on one die, a process called Multi-Chip Modules (MCM).

AMD (NYSE: AMD) argues that going pure quad core with Barcelona was the best solution to the problem, despite the delays.

“An unconnected MCM wouldn’t have given them the scalability we wanted,” explained John Fruehe, worldwide business development manager for Opteron at AMD. An “unconnected” MCM design is what Intel (NASDAQ: INTC) uses with the Xeon, in that if one of the chips on the die wants data from another, it has to go out to the second chip and back through the frontside bus and memory controller.

Barcelona’s native quad core design means all four cores talk directly to each other, without going through any other buses or bottlenecks. Fruehe argues it was worth the up-front pain to make it such.

“We weren’t going to rush to market an unconnected MCM and to do a fully connected MCM would have taken much more time, almost as much as making a native quad-core anyway. Doing native quad-core enables us to have the flexibility to do native six-core without having to rev it again,” he added.

In-Stat analyst Jim McGregor said that he thinks some people at AMD came to regret the decision. “After the first few slips of Barcelona, they were asked if they should have done MCM and they said in hindsight they should have,” he told InternetNews.com. “After Barcelona shipped, I asked them ‘what are your lessons learned?’ They said ‘don’t introduce so much risk into the design’.”

AMD already had an MCM plan in mind with Montreal, its aborted eight-core processor that was planned for 2009 as late as last December. Montreal would simply be two Shanghai quad core chips on one die.

But Montreal was going to mean a new socket design and platform. So in the process, AMD has given the Socket F design first introduced with the dual core Opteron in 2006 a life extension.

“What we did was extend the life of the second generation platform,” said Fruehe. “The last stop on the Socket F route was supposed to be Shanghai. Instead, we added Istanbul, a six-core second-generation design. The fact you get more life out of that platform, from 2006 to 2010, that’s an awesome story for customers looking to minimize the churn in their datacenter.”

Istanbul and Sao Paulo, the 2010 processor design, will both be fully native six-core designs, an easy extension from Barcelona’s quad core design. AMD was able to get there faster than had it simply fudged a quad-core design using an MCM, Fruehe argued. And it will be safer course in terms of manufacturing.

“There are economics of how you are going to manufacture the product,” he said. “The more cores, the larger the die, the larger the die the smaller the yield per wafer and the larger an impact of defects.”

Putting 12 cores on one chip is sure to blow thermal and power limits, but because it is so far off, Fruehe declined to comment on the clock speed for Magny-Cours. He would not discuss the thermal and power draw of the chip, but said it would not be a doubling of the “Sao Paulo” numbers.

McGregor said the company was smart to avoid biting off more than it could chew. “They have learned some hard lessons from Barcelona. There doesn’t seem to be a huge amount of changes in the road map, but they still have to be competitive, too. We’re looking at Nehalem later this year with native quad core and octo-core MCM.”

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