Chips in the Future: It’s A Small World

By the year 2018, computer chips will be faster, cheaper and smaller than the width of a human hair, but will take a bit longer to produce. That’s the consensus of a new report released Wednesday by the five semiconductor trade groups.

In its 2003 edition of the International Technology Roadmap for Semiconductors (ITRS), the Semiconductor Industry Association (SIA), along with its counterparts in Europe, Japan, Korea, and Taiwan, updated their 15-year timetable for how the chip sector should shake out. The 500-page report, which focuses on key issues and trends represents the latest available data from some 900 industry experts, international consortia, universities, and research institutions around the world.

This year, the ITRS forecast also expanded its reach in two directions: novel memory devices operating on new principles, which describes new post-CMOS devices, and wireless communications.

“These two areas highlight the emergence of nanotechnology operations, as well as the convergence of applications shifting from analog to digital,” ITRS chairman and Intel Director of Technology Strategy Paolo Gargini said in a statement.

The prognosis, according to SIA Vice president for Technology Juri Matisoo, is that chip making advances such as using nanotechnology should slow down from its rampant two-year cycles to a more manageable three-year ones. Such was the case from the first processors being built on the 130-nanometer (nm) process in 2002 to 90nm chips due out this year.

“It’s just basically the rate at which the technology is evolving,” Matisoo told “The benefit is that it follows closer to Moore’s Law. Companies want to work toward making chips smaller because it helps them get faster, take up less power and cheaper — as much as 25 percent — for the same functionality. There are fierce competitors pushing the technology and the one who gets there first with the most products gets the most money.”

The advances also come with their own unique challenges such as leakage and power dissipation.

“From a point of view of the physics, it is possible but going down to the nano-level and making these things by the billions is a huge challenge for designers,” Matisoo said. “One of the biggest problems as you scale down and the density per square micron is getting the power in and getting the heat out. And then there are issues with the fabrication. How do you test the chips to make sure that it does what you designed it to do?”

A new problem now facing chipmakers is the cost of actually building and bringing one to market. The industry trend to move to 90nm comes with an estimated $30 million price tag.

During its yearly forecast, SIA officials pointed to rising chip development costs with each new process node. For example, if a company is spending 20 percent on R&D, the revenue target of that company should be about $150 million. Compound that with a company that has at least 10 percent market share. The SIA said the revenue target of that company should be about $1.5 billion. The justification of ASIC/ASSP development requires approx $1 billion.

Compound that with a company that has at least With 10 percent market share $1.5 billion and the justification of ASIC/ASSP development requires approximately $1billion.

That cost may be mitigated in building larger sized wafers, which would fit more chips on it per-square-millimeter, but that may take another eight years to come to fruition. The industry currently uses 200mm and 300mm wafers that cost about the same to produce.

“How much a chip costs, depends on how many you can get on a wafer,” Matisoo said. “The rule of thumb is that an average wafer costs between $1,000 to $2000. There is a roadmap to increase that wafer size to 400mm starting around 2012, but that is a ways off.”

SIA president George Scalise said he expects the research community to scan the ITRS report for opportunities to help manufacturers speed up their development cycles and prepare for the changes.

“We hope that the 2003 ITRS will further contribute to shared R&D investments so that the financial weight of pre-competitive technologies can be equitably shared by the whole industry,” Scalise said in a statement.

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