As the chip sector continues its rebound, a new research report points to a potential slump in the electronic design automation (EDA) segment of the semiconductor market.
According to a report released this week by American Technology Research, design firms should hunker down for a cold winter.
“We recently adopted a more cautious stance on the electronic design automation sector based on our underlying concern that the EDA market has shifted from a market-expansion phase to a market-share retention phase,” said American Technology Research analyst Erach Desai.
Desai says that his research reveals, “The increasing evidence of FPGA design traction through our coverage of the programmable logic component market, suggests that ASIC design starts continue to drop at a precipitous rate.”
Desai predicts the market for FPGA will continue to grow. FPGA, or Field Programmable Gate Arrays are gate arrays where logic networks can be programmed into the device after its been manufactured. FPGA’s consist of an array of logic elements, either gates, lookup table RAM’s, flip-flops and programmable interconnect wiring.
Desai said close to 80 percent of all spending on EDA is on integrated circuit design.
“We believe that the ASIC-specific content of all IC design spending has shifted from about 45 percent in 1996 to about 55 percent in 2003,” said Desai. An ASIC is an integrated circuit designed to perform a specific function by defining the interconnection of a set of basic circuit building blocks drawn from a library provided by the circuit manufacturer.
“Our findings suggest that ASIC design starts peaked at an annualized rate of 10,500 in 1996 and we project that there will be under 2,500 ASIC design starts in 2005. By extension, we believe that EDA revenues for ASIC design will likely peak in 2003 and will decline by 4 per cent in 2004 and decline further by 9 per cent in 2005. Thus, overall EDA revenues will likely be flat in 2004 and 2005, versus our current projections of 4 percent and 7 percent growth respectively,” Desai said.
“Our analysis reinforces our existing investment thesis on the EDA sector: the market appears to be flattish to low-growth from a multi-year standpoint as traditional ASIC design starts are increasingly encroached by FPGA designs,” added Desai.
In contrast to Desai’s concerns about the near future of the EDA market, Gartner Dataquest came out with research this past summer that paints a more optimistic scenario.
In August, Gartner Dataquest predicted the EDA market would grow 14.9 percent for 2004. Gartner goes further to say that as electronic system level (ESL) tools become operational in 2005, the technology research group expects ESL to drive the EDA industry to 20 percent annualized growth from 2005 to 2007.
“By 2007, we expect the EDA market to reach approximately $5.5 billion in product revenue, approximately double its level today,” the Dataquest report said, adding it will update its EDA research in early December.
Consolidation also appears to be a growing feature of the chip design sector. Back in October, Magma Design Automation made two acquisitions of Silicon Metrics and Random Logic. Magma’s purchases were a step towards taking on its principal rivals in the market: Cadence Design
, Mentor Graphics
and Synopsys
. As a result of the purchases, Magma said it is better positioned for the next wave of silicon production at the 90 nanometer level.
