IBM Shows Some Ankle on Power5

IBM’s next Power 5 microprocessors are slated to debut next year, but the Armonk, N.Y.-based company has begun teasing some details of the systems, whose innovations feature two 64-bit processors on a single chip.

During the annual “Hot Chips” technology conference in Palo Alto, Calif., this week, IBM executives are unveiling new details about the Power5 processor, such as its Simultaneous Multi-threading (SMT) technology that enables two virtual processors for each semiconductor.

“It’s a key innovation,” Mark Papermaster, director of global
microprocessor design in IBM’s Systems Group told internetnews.com.
“It’s part of our road map to increase the performance we provide to our
customers.”

When Power5 is released, it will support IBM’s pSeries and iSeries line
of servers, company officials said.

Papermaster said because of the multi-threading capability in the
processors, they will be able to power more throughput while helping to optimize power where it’s needed in major applications.

Whether handling one thread or switching over to two, the processor’s SMT innovations
ultimately help make it appear as though there are four processors on the
chip instead of the two that already characterize the breakthrough in Power5
architecture, Papermaster said. Power5 is also backwards compatible with
32-bit architecture along with 64-bit computing systems.

In addition, the system built onto the chips includes autonomic
capabilities, or self-diagnostic software that help the chip shift power to processing jobs as demand spikes, and essentially power itself to a lower-power mode when demand
slacks off.

Papermaster said IBM expects to see a four-fold increase in speed up in
terms of total system performance with the Power5.

The company has yet to release any benchmarks about clock speed or how much bandwidth the chips can power. But according to a published report, the
chip line would be capable of 3.0 GHz clock speed when it comes out. Citing
a non-disclosure agreement it obtained about the chips, The Register.com said the
first Power5 chips would start at around 1.4GHz processing speed, and eventually rise to 2.0GHz before the Power+5 chips come out with capabilities of between 2.0GHz and 3.0GHz.

The Power5 processor is slated to be the center of IBM’s squadron line of
servers.

In a related development, an IBM spokesman confirmed that the company
would be laying off 600 employees in some of its technology group divisions,
including its Burlington, Vermont and East Fishkill microprocessor
manufacturing facilities. The company said the move was to cut costs as
worldwide demand for chips – though improving – is still slumping.

A spokesman said another 3,000 employees in the company’s technology
group would be asked to take one week off unpaid as part of an effort to
reduce costs in the group, which lost about $110 million during the second
quarter of the year.