Itanium Looks Forward, Thinks Backward

SAN FRANCISCO — While its Itanium chip is surging ahead, Intel Tuesday released some new software that makes its high performance server chip think a little about the past.

The Santa Clara, Calif.-based chip making giant said its new IA-32 Execution Layer (EL) software is now available as part of its Intel Enterprise Compiler v.8 .0. Once installed, the EL translates the 32-bit IA-application code to run on 64-bit Itanium processors as native code.

The company chose to release its first round of support for Windows Server 2003 Enterprise Edition, Datacenter Edition, and XP 64-Bit Edition. The software will be available for Microsoft Windows Server 2003 Service Pack 1 in the second half of this year. Intel said Red Hat is currently working on a Linux version, which is also expected later this year.

Intel senior vice president of Enterprise Platforms Mike Fister said the translation benchmarks to about the same performance level as a 1.5GHz Xeon.

“This amounts to 70 percent of the performance in projection,” Fister said during a press briefing. “You can’t get 100 percent, but when you combine that capability with the lack of work of moving the application over to 64-bit, it makes it a compelling sales point.”

Sales of Itanium have been sputtering along. In November, Intel COO Paul Otellini said the company is on track to ship 100,000 units by the end of 2004 and about 300,000 by the end of 2005.

But are companies buying large computing configurations? Fister said yes, citing customers that have purchased Itanium systems with $50 or $60 million price tags. Intel said the numbers are significant since it proves Itanium has the mettle to compete with other 64-bit RISC and x86-64 processors.

For example, AMD has seen some serious pick up for its Opteron and Athlon 64 products, previously code-named “Hammer.” The server and desktop processors can run 64-bit applications natively but are also backwards compatible with 32-bit programs.

Gartner Dataquest research fellow Martin Reynolds said the move to include 32-bit instructions is indicative of Intel’s attempts to transition people away from RISC-based processors and bring Xeon customers into their Itanium world.

“Right now, we see the total market revenue at $40 billion and continuing to stay that way,” Reynolds told “What is happening here is that the spending is shifting from big RISC chips to other market segments. Xeon is actually taking share away from Itanium. That will shift as Intel continues to bring people toward Itanium and 64-bit computing as a whole.

Fister said that transition period where Itanium becomes the volume sales chip over Xeon should happen by the end of the decade.

In all, Intel’s roadmap for its server lineup is pretty aggressive. The company said by the end of the year it will increase the size of the cache on its Xeon multi processor (code-named Galatain) to 4M and will enhance its dual-processor Xeon. The company is also expected to debut its blade server processor (code-named McCarran) to counter IBM’s blade chips. For its Itanium product line, Intel said it would announce new chips to its high-end lineup at its semi-annual developers conference.

“We are working on six different Itanium processors this year alone,” Fister said.

The company is also finalizing its Nocona processor platforms, which include Lindenhurst/Tumwater chipsets. Both are on track for their introduction by the end of June. The newer Itanium and Xeons are expected to take advantage of a faster Front Side Bus technology, PCI-Express, DDR2, and Dual channel Gigabit Ethernet to keep them ahead of the competition.

In 2005, Intel said it would improve the cache recovery for its server semiconductors; introduce chips with two physical processor cores and allow for user-defined power thresholds. By 2006, the company estimates it will have multiple physical processor cores in production and better data center power management and control courtesy of its La Grande technology.

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