SAN JOSE, Calif. — Transmeta
has got to win an award for the number of most subtle hints dropped about a product prior to its release.
Since it was first mentioned during the Microprocessors Forum here last year, the Santa Clara, Calif.-based firm has referenced its TM8000 processor more than a dozen times in either full releases or briefings with reporters. Transmeta vice-chairman and chief technology officer Dave Ditzel is scheduled to make the official presentation later today.
Formerly known as Astro and now identified as Efficeon, the first generation of the brand will start at speeds of 1.1 GHz and ramp up 1.3 GHz. The processor is being marketed for 12- and 14-inch notebooks, Tablet PCs, ultra-personal computers, silent desktops, blade servers and embedded systems. The chip is available to ship now and should debut on store shelves sometime in the next few months.
Transmeta Senior VP of Marketing Art Swift says the chip had been going under revisions even up to the last minute.
“It never happens as quickly as you want because there is intricate testing,” he told internetnews.com.
Finally though, the 7-watt low-power chip has 1 MB Level 2 cache with ECC and 128 KB Level 1 instruction cache. The Efficeon is being produced by using 130nm manufacturing technology as a 256-bit VLIW
And even stepping back to compare to Intel’s
7-watt Centrino chipsets, Swift says the Efficeon is faster.
“The benchmarking that we are doing internally is that we are right in line to where we want to be,” he said. “We are 50 percent ahead of Crusoe and incrementally better than Centrino, so that speaks well to the technology.
Intel’s components include the processor, the Northbridge system, and the Southbridge system, whereas the TM8000 includes integrated Northbridge core-logic technology, which connects the CPU to the system memory and the AGP (2x or 4x). Transmeta says combining the logic core with the Northbridge system frees up space to let you pick your own graphics.
In preparation for the release, Transmeta recently inked a deal to have NVIDIA
build a companion graphics processor
The Efficeon includes three new high performance bus interfaces include an on-chip 400 MHz HyperTransport bus interface, a technology taken straight out of AMD’s
design playbook as well as up to Double Date Rate 400 (DDR-400) DRAM
Transmeta is using its fab-less partner TSMC (Taiwan Semiconductor Manufacturing Company)
to produce the first generation 130nm process version. Fujitsu Semiconductor was recently named as the “first” foundry to produce the second generation of Efficeon processors. Engineering teams from the two companies have been working closely together to port the Efficeon design to Fujitsu’s CS100 90-nm CMOS process, which features transistors with a 40nm physical gate length.
The second generation Efficeon chips are due out in 2004 and are expected to run between 1.0GHz at 3-watts all the way up to a 2.0 GHz version that only takes up 25 watts of power. A third generation Efficeon is already being planned using the 90nm and 65nm processes with higher performance, extended power Range and other bells and whistles.
The company says it has already signed up partners for its new chip including ROX for blade servers