In the chipmaking world, bigger isn’t better. It’s just the other way around: Tinier chips enable semiconductor makers to create faster, higher-capacity chips that require less energy. But each innovation in shrinking chips comes only after vast amounts of expensive R&D, making each new step down in size a major undertaking affordable by only a select few companies.
Today, Intel — the world’s largest chipmaker — and its partner Micron said they’ve succeeded in just such an achievement. HardwareCentral examines their latest development: a 25-nanometer chipmaking process aimed at the flash memory market.
In the continuing race to design the smallest silicon chips, Intel and Micron Technology have struck again. The duo, partners in flash development, were the first to reach 34-nanometer-process designs for NAND flash memory and have now reached the 25-nanometer barrier.
It’s an incredibly small process. If a human hair was a mile wide, the 25nm process technology would equate to 21 inches of that hair’s diameter.
But this tiny design will hold a lot of transistors and hence higher capacity: Intel and Micron will produce chips that can store 8GB in a single NAND device. This translates into doubling the amount of storage capacity in a similar space over previous generations of flash.