IBM Cures CPU Sprawl With 3D Stacking

IBM has found a way to make three-dimensional semiconductor design and fabrication economical in mass quantities, which could mean radical breakthroughs for performance and power savings.

Semiconductor design has, for the most part, been two-dimensional and flat across the silicon. The new IBM  design, called 3D stacking or “through-silicon vias,” allows for stacking elements of a semiconductor on top of each other.

This eliminates the need to run wires around the periphery of the chip and allows for components of a semiconductor to be stacked vertically instead of side-by-side. By closing the distance, a power savings of up to 40 percent might be possible, Wilfred Haensch, manager in explorative technologies at IBM told

IBM’s new method involves creating tiny holes that are etched all the way through a chip and then injected with tungsten to create wires. Because they are no longer spread out on a horizontal plane, the components can actually be packed closer together. This means less power consumption in transferring data around, and improved performance as well.

The technique shortens the distance information needs to travel on a chip by up to 1000 times and allows for the addition of up to 100 times more channels, or pathways, for that information to flow.

IBM expects the technology will first find its way into wireless communications, where the power reduction will translate into a longer battery life. Also, through-silicon via technology is more efficient for signal transfer than the wire bonds normally used.

From there, IBM said it sees their chip designers incorporating through-silicon via technology for large, multi-core processor design. Multiple cores means some cores are further from the power source than others, but with stacked design, all of the cores are easier to reach. Haensch theorized that cores could be kept on one level while the caches could be on a separate level. This would increase processor speed and reduce power consumption up to 20 percent.

Finally, on the high end, IBM would find a way to bring stacking designs to the chips used in the Blue Gene supercomputer. This would change the way memory communicates with a microprocessor, significantly enhancing the data flow between microprocessor and memory.

Jim McGregor, director of semiconductors & enabling technologies research for In-Stat, told that stacking technology has been around for some time, but IBM’s technique is revolutionary in that the interconnects go through the chip.

“That will definitely improve performance because of the shorter interconnects,” he said. “It also gives more options for more interconnects on the chip. It takes Moore’s Law  to an exponential level.”

IBM expects to have sample chips out later this year to OEM partners and to begin mass production by 2008.

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