Chip Foundry Unveils Advanced Collaboration Tools

Semiconductor foundry Taiwan Semiconductor Manufacturing Co. (TSMC)
Wednesday, still feeling the effects of a listless market, unleashed a new
Internet-based design collaboration platform that it said would reduce
document preparation lead-time from days to less than an hour.

Dubbed DocuFast, the searching and grouping service provides automated
design document preparation, maintenance and sharing capacity. It consists
of a suite of prepackaged and verified design-related technology documents
specific to TSMC’s technologies, including Design Rule Manuals, Spice
Models, DRC (Design Rule Check) command files, LVS (Layout vs. Schematic)
command files, and RCX (RC Extraction) files.

TSMC said the service will allow designers to compile and store documents
specific to their projects in a virtual reference area, and re-work on
design can be reduced through early version change notification.

“DocuFast is a key online tool from TSMC to help designers speed and
simplify their interaction with the industry’s first true design
collaboration platform,” said Genda Hu, vice president of marketing for
TSMC. “This latest advance addresses one of the most difficult problems
that all the designers are facing today. Not only because of the technology
complexity which results in many different documents, but because of the
frequent engineering changes, which results in many different versions of
documents.”

The service helps designers create their design document packages by
leading them through a series of steps. Designers can then share their
DocuFast document packages with other design team members. The service will
automatically mail notification of future Engineering Change Notices (ECNs)
for specific documents to all members sharing DocuFast document packages.
The service also includes up-to-date fact sheets for more than 40 TSMC
technologies, ranging from 0.35-micron to 0.13-micron line widths, as well
as CMOS and BiCMOS logic, mixed signal, silicon germanium, Flash, Emb1TRAM
embedded memory and image sensor technology.

But while the foundry is attempting to make itself more inviting to
designers, it is also facing the reality of the long-languishing
semiconductor market. The company said Wednesday that it will cut its
estimated output capacity from 10,000 300-mm silicon wafers per month by
December 2002 to about 5,000 wafers per month.

The company explained that the weak economy has hampered its efforts to
apply advanced process technologies to manufacturing 300-mm wafers. The
capacity downgrade is the second by TSMC this year. Citing weak demand in
the 300-mm segment, TSMC also said it would slow the ramp of its second
300-mm wafer plant.

However, the firm is continuing expansion in other areas. It is looking to
build another 200-mm wafer plant in Shanghai, and applied to the Taiwan
government for permission earlier this week.

Meanwhile, TSMC’s biggest rival, UMC, is forging ahead with its 300-mm
wafer plans. On Monday, it united
with AMD to build a 300-mm manufacturing facility in
Singapore, using advanced process control technology.