IBM Inks Deal To Incorporate FPGA Cores

IBM Monday became the first major company to address the need for
a hybrid FPGA/ASIC chip, signing an agreement with Xilinx to
bring broad adjustment programmability to its recently announced CU-08 Chip.

Under the agreement, IBM has licensed field programmable gate array (FPGA)
technology from Xilinx for integration into IBM’s
recently-announced Cu-08 application specific integrated circuit (ASIC)

The deal will enable the creation of “hybrid” chips that combine the
attributes of standard ASICs, which are built by connecting existing circuit
building blocks in new ways, and FPGA, a type of logic chip that can be
programmed to support thousands of basic logic circuits (gates).

“We’ve improved upon our delivery of programmable hardware by allowing
reconfiguration using the same chip. Flexibility is the beauty of combining
ASIC and FPGA technology,” said Wim Roelandts, president and CEO at Xilinx.

Because of the programmable makeup of FPGA, engineers working on complex
chip designs will have the ability to change “on the fly” late in the design
cycle, while at the same time maintaining the performance and overall cost
advantages of an ASIC.

“Savings here could be dramatic,” said Michel Mayer, general manager, IBM
Microelectronics Division. “When an ASIC takes on more function, you can
reduce cost by eliminating one, two or even more separate chips. With this
technology, customers would be able to tweak designs and integrate new
changes immediately, eliminating the need to restart a whole new design
cycle, bringing tremendous time-to-market advantages.”

Mayer estimates that changes that force an additional chip prototype can
easily cost hundreds of thousands of extra dollars.

Having the FPGA integrated into an ASIC also enables engineers to take a
custom chip already in a product, and by altering the ASIC design though the
FPGA core, adjust it to adapt for changing standards or for use in other

Three FPGA cores will be introduced with 10,000, 20,000, and 40,000 gates
that can be implemented as a single core or replicated together to form
blocks as large as 100,000 to 400,000 gates.

According to a Gartner Dataquest Analysis issued this morning, this is a
very significant announcement for two major reasons. This is the first time
that market leaders Xilinx or Altera have licensed their FPGA technology to
another semiconductor company, and this is the first major attempt by two
industry leaders to satisfy the existing need for a hybrid ASIC/FPGA.

The new FPGA cores, now in development, are expected to be available from
IBM embedded in an ASIC in early 2004, following IBM’s full release of its
standard-setting Cu-08 technology.

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